We have the following urgent requirement with our client:
Title: Physical Design Engineer(s)
Location: Santa Clara, CA
Duration: 12+ Months
Desired Skills & Experience:
- Responsibilities includes all aspects of physical design including synthesis, floor planning, place and route, Clock Tree Synthesis, Clock Distribution, IP integration, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, DFM and Tape Out. Should be able to interface with Front End Design team to resolve Design Issues
- Mentoring new team member
- Must possess 6+ years of hands on experience in the Hardmacro through P&R from Netlist to GDS including timing closure and Physical verification (Proficient in Synopsys ICC, Magma Talus or Cadence FE tool set.).
- Design experience in all aspects of physical design.
- Proficient in Synopsys ICC, Magma Talus or Cadence FE tool set.
- Experience with Mentor Olympus tool is a Plus
- Technologies: 28nm, 32nm and 40nm.
- Experience in Mentor caliber tools to run Physical verification
- Knowledge of I/R drop analysis is a Plus
- Experience in Tcl/Tk, PERL is a Plus
- Excellent verbal and written communication skills are required.
- Excellent interpersonal and analytical skills with the ability to work independently.
- Highly motivated, excellent team spirit, product and customer oriented.
Education: B.Tech/B.E. - Any Specialization, Electronics/Telecommunication, Electrical) OR (PG - M.Tech/M.E - Any Specialization, Electrical, Electronics/Telecommunication)