TITLE: Analog Mixed Signal Engineer
The following is what is needed for the AMS simulation role.
Defining the verification plan in cooperation with chip lead and application engineers
Developing the AMS simulation environment: drivers, monitors, checkers and assertions. This phase also includes the creation for the electrical rule checks (ERC).
Developing and validating high-performance behavior models in Verilog-A of low frequency building blocks such as LDO, BB filters, OpAmp, Bandgap, Charge Pump… as well as RFIC building blocks from the RX chain and TX chain (mixer, LNA, Driver Amplifier, PA, bandpass filter …)
Developing and running top-level (chip-level) simulations according to the verification plan
Preparing and holding design verification reviews and report back the failing conditions to the chip lead or the application engineer
Creating and maintaining regression test suites
Involved in defining and driving design and verification methodologies
Convert verification tests to test patterns and assist Test Engineers on ATE vector bring-up.
Replicate after-tape out bugs in the simulation environment and validate fixes or SW workarounds.
Evaluate latest verification methodologies and develop scripts etc. to automate verification flows.
Mandate/Must skills required
The person in this role should be:
operate as a self-starter
Able to work with both Verilog-A, Circuits Schematics and Verilog RTL