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FPGA Emulation Engineer

Location: San Jose, CA
Job # 11816344
Date Posted : 01-08-2019
We have the following urgent requirement with our client:

Title:  FPGA Emulation Engineer
Location:  Menlo Park, CA or Santa Clara, CA
Duration:  6 to 12+ Months
Compensation: DOE

Experience and Skills Required
  • Hands-on experience designing and supporting an FPGA-based emulation platform used for verification and early firmware development
  • Experience with features such as PCIe and LPDDR5
  • Create FPGA emulation models from RTL using FPGA synthesis, partitioning and routing tools
  • Hands-on design and debug with Xilinx and/or Altera tools and devices
  • 8-10 years’ industry experience, BS EE

Roles & Responsibilities
  • Manage complex projects and assignments with high level of autonomy and accountability for results
  • Define and develop capabilities to enable acceleration of RTL and improve emulation/FPGA model reusability across IP/SoC, Pre and Post Si Validation
  • Support Software and Validation team with model use
  • Develop hardware collateral to be integrated with the FPGA emulation model
  • Zebu, Veloce, HAPS-80 knowledge is desirable but not mandatory

Employee Referral Program:

We are hiring !
The Employee referral bonus is $500 per referral after the new full-time employee successfully completes 90 days.
The referral bonus for hourly contractor is $250 after the completion of 90 days.
However, managers who have hiring/team building as part of regular management duties are not eligible in the program.

Please send in resumes to Redolent, Inc., 4620 Fortran Drive, Suite 201, San Jose, CA 95134

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