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Design Verification Engineer (BFM /C / Verilog )

Location: Hillsboro, OR
Job # 11422502
Date Posted : 09-28-2018
We have following urgent role with our  DIRECT client

Title: Design Verification Engineer (BFM /C / Verilog )
LOCATION: Hillsboro, OR 
DURATION: 6+ months 
Compensation: Competitive ( DOE )

Job Description:
  • Experience in  C or SystemC modeling experience in addition to Design Verification experience. 
    5+ years, familiar with Verilog/System Verilog simulator DPI. 
  • Experience with BFM BUS Functional Module ), which synonymous to Verification IP or VIP.

Employee Referral Program:

We are hiring !
The Employee referral bonus is $500 per referral after the new full-time employee successfully completes 90 days.
The referral bonus for hourly contractor is $250 after the completion of 90 days.
However, managers who have hiring/team building as part of regular management duties are not eligible in the program.

Please send in resumes to Redolent, Inc., 4620 Fortran Drive, Suite 201, San Jose, CA 95134

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