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Technical Architect ( Physical Design/ SoC)

Location: Hudson, MA
Job # 11375015
Date Posted : 09-14-2018
We have the following urgent requirement with our client:
 
Title:  Technical Architect ( Physical Design/ SoC)
Location: Hudson, MA
Duration:  Full time ( preferred )  or  long-term contract (
Compensation:  DOE


Qualification/Experience/Skills Required
  • Ability to define and describe (write specification for) system architecture, external interfaces, register definitions and operations, major partitions
  • Ability to write clear, concise documents and diagrams (timing, state machines, register maps, memory organization, synchronization sequences, etc.) to describe functional and operational (parametric) aspects of a complex SoC
  • Domain knowledge of various software applications and their underlying hardware requirements (e.g., networking, AI, Machine Learning, storage devices, IoT)
  • Experience in Digital module design and micro-architecture
  • Experienced at modeling complex state machines, datapaths and bus protocols/high speed (bandwidth) interfaces such as PCIe, USB, HBM, DDRx
  • Experience in RTL simulation, synthesis, Linting, CDC checks, STA, DFT, quality metrics
  • Hands on in SoC level RTL integration
  • Hands-on expertise in writing System Verilog and VHDL
  • Hands-on in Perl/Tcl/Unix scripting 
  • Excellent analytical, and problem solving skills
  • 15+ years’ industry experience, Master’s degree or equivalent in EE or Computer Engineering (CE)
 
Roles & Responsibilities
  • Write clear, concise specification for an SoC including functional and timing descriptions for top level pins/ports/interfaces, registers and memories, state machines, datapaths, operating modes, exception/error handling, clocking, reset, power domains, etc.
  • Describe parametric/operating environment requirements including performance, power, area (PPA) targets, temperature and process ranges, IO pads, parametric tests, etc.
  • Interact with other system architects to define the application environment for the SoC being designed (firmware and OS requirements, external storage devices, sensor/analog components, etc.)
  • Provide SoC (top) level constraints and partitions for RTL/Logic designers, floorplan & PD engineers, DFT requirements
  • Working closely with synthesis, STA, PD and DFT teams to meet all functional requirements, performance, power and area goals, functional and diagnostics test coverage
  • Technical interaction with engineering team


Employee Referral Program:

We are hiring !
The Employee referral bonus is $500 per referral after the new full-time employee successfully completes 90 days.
The referral bonus for hourly contractor is $250 after the completion of 90 days.
However, managers who have hiring/team building as part of regular management duties are not eligible in the program.

Please send in resumes to Redolent, Inc., 4620 Fortran Drive, Suite 201, San Jose, CA 95134


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