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IP Level verification Engineer

Location: San Jose, CA
Job # 10494712
Date Posted : 02-26-2018
We have following urgent role with our client:

Title: IP Level verification Engineer
Location: San Jose, CA
Duration: 6+ Months
Rate: Market

Required Skills:
  • Should have expertise on System Verilog with UVM methodology.
  • Should have experience in developing Test Bench/architected test bench.
  • Experience developing test Bench components: Drivers, sequencers, monitors, Scoreboard, Assertion checks.
  • Should have experience on constrain random data generation.
  • Should have good experience at IP, subsystem level verification.
  • Experience in writing assertions
  • Experience Functional coverage and code coverage
  • Test case development, simulation and debug
  • Good knowledge on Clocks, reset, Boot
  • Good protocol knowledge of AXI, AHB, APB
  • Experience on any of the below Standards/modules:
-        PCIe
-        DDR(LP_DDR 3)
-        ARM/CPU
-        NOC/Fabric BUS express
 


Employee Referral Program:

We are hiring !
The Employee referral bonus is $500 per referral after the new full-time employee successfully completes 90 days.
The referral bonus for hourly contractor is $250 after the completion of 90 days.
However, managers who have hiring/team building as part of regular management duties are not eligible in the program.

Please send in resumes to Redolent, Inc., 4620 Fortran Drive, Suite 201, San Jose, CA 95134


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